1. Field of the Invention
The present invention relates generally to digital-to-analog converters (DACs), and more specifically, to a DAC having filter sections that differ in polarity.
2. Background of the Invention
DAC circuits implemented using a finite impulse response (FIR) filter are used widely in delta-sigma modulator based DAC integrated circuits. Conversion of a digital value to an analog signal is accomplished by serially clocking a bitstream output of the delta-sigma modulator through a shift register that controls a number of current sources. The current sources are summed to provide an analog output, which is typically converted either internally or externally to a voltage representing the digital value. The filtering action is provided by the summation of the individual currents which act as equal-weighted taps of the filter, and provides a low-pass characteristic determined by the length of the filter which removes quantization noise that is aliased above the Nyquist frequency of the converter.
DAC outputs, particularly those used as audio signal sources, frequently require a bi-polar output characteristic, in which the full range of the output is substantially centered around a zero-voltage or zero-current level. The extremes of the output extend from a positive full-scale value to a negative full-scale value. The DACs output may be a current output that mirrors the current outputs generated by the DAC elements, or a single-ended or differential voltage output generated by a trans-resistance stage that converts the current to a voltage. In one typical switched-current FIR filter output configuration, a bipolar output is provided by summing the current sources selected by the filter taps, which are of a single polarity. The resulting sum is then combined with a fixed current of opposite polarity that is substantially equal to half of the maximum selectable tap current, in order to set the midpoint of the output near zero current. The fixed current source adds noise to the output without contributing any signal margin. Also, the capacitance of the DAC current output varies with the value being converted. Further, each pair of current sources must be well-matched, as well as the matching typically required among the individual taps.
In another typical switched-current FIR filter output configuration, two current summing nodes are provided and current sources of both polarities are selected to one of the two summing nodes according to the bit value at the corresponding tap. The signal-to-noise performance is improved over the above-described configuration, and the output capacitance is held substantially constant. However, additional circuit area and power are required to provide pairs of current sources for each tap.
Finally, an offset can be provided in the output amplifier of a DAC to bias the uni-polar current output to form a bi-polar output. However, such schemes are typically undesirable, as variation in the offset from device to device and over temperature is difficult to control and may require large circuit area and power to provide a stable offset current or voltage reference.
Therefore, it would be desirable to provide a DAC having a bipolar output with reduced noise that does not require additional circuit area and power, nor having increased matching requirements over a DAC having a uni-polar output.